1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device including a semiconductor element such as an IC (integrated Circuit) encapsulated by molding compound.
2. Description of the Related Arts
There are various types of semiconductor devices using various types of packaging techniques. As one type of such various semiconductor devices, there is a semiconductor device of surface mount type, which has relatively reduced size and thickness and thus can be suitably mounted onto a circuit board etc., with its lower mounting height etc., such as a SOP (Small Outline Package) type semiconductor device, a QFP (Quad Flat Package) type semiconductor device, and so on. On the other hand, a semiconductor device of plastic encapsulated type, in which the semiconductor element, such as an IC, is encapsulated by plastic, is also well known, which can be constructed as the above-mentioned surface mount type, and is utilized in various kinds of electronics apparatuses.
The plastic surface mount semiconductor device is provided with a lead frame including a plurality of leads and a die pad, onto which a semiconductor element is mounted. The die pad as well as the semiconductor element is encapsulated in molding compound.
The inventors of the present invention know one type of such a lead frame used in the plastic surface mount semiconductor device, which includes a die pad portion as shown in FIG. 1.
The semiconductor element to be mounted on the die pad 50 in FIG. 1, has an outer plane shape same as that of the die pad 50, or an outer plane shape slightly smaller than the die pad 50 as indicated by the broken line B in FIG. 1.
FIG. 2, which consist of FIG. 2a to FIG. 2d, show one example of a semiconductor device in various conditions, which is manufactured with using such a lead frame including the die pad 50 in FIG. 1, and a semiconductor element, by means of a transfer-molding technique.
In FIG. 2a, a semiconductor element 51 is mounted i.e. die-bonded on the die pad 50, and is encapsulated in a molding compound 52.
In this kind of the semiconductor device, the moisture absorbed by the molding compound 52, during the storage stage before the soldering process of the semiconductor device, as shown in FIG. 2a, has a tendency to be concentrated, as indicated by a concentrated moisture D in FIG. 2b, to the interface between the die pad 50 and the molding compound 52. This interface has a relatively weak adhesion, at which the die pad 50 can be rather easily delaminated.
Here, the concentrated moisture D is likely to become a vapor E and thus expand as shown in FIG. 2c, when the semiconductor device is heated in the soldering process. At this time, a package crack F is generated in the molding compound 52, by the stress generated by the vapor E, as shown in FIG. 2d.
By the way, in case that the semiconductor device is manufactured by use of the die pad 50 shown in FIG. 1, the flexural stress generated by the vaporizing expansion of the moisture under the die pad, is expressed by the following expression (1), if it is resolved by means of a homogeneously distributed load model with fixing the peripheral of the rectangular shape plate (die pad), in which the flexural stress has its maximum value at the center of the longer side of the die pad. EQU maximum flexural stress=K(a/t).sup.2 P (1)
wherein,
P: vapor pressure (Kg/mm.sup.2) PA1 a: the length of the shorter side of the die pad (mm) PA1 K: a coefficient given by the aspect ratio (b/a) (as the value (b/a) increases, K increases) PA1 b: the length of the longer side of the die pad (mm) PA1 t: the thickness of the resin under the die pad (mm).
As clearly indicated by this expression (1), the stress applied to the central portion in the longer side of the die pad, becomes larger, as the size of the die pad becomes larger.
Accordingly, as the size of the semiconductor element increases and as the size of the package decreases, the possibility or the fear of the package crack generation increases, so that the counter-measure is strongly desired especially in the case of the plastic surface mount semiconductor device such as a SOP type or QFP type semiconductor device, in the practical sense.
One method as the counter-measure for this problem, is proposed in the Japanese Patent Application Laying Open No. 63-204753, in which a die pad having an outer plane shape smaller than the semiconductor element to be mounted thereon, is employed. However, if the area of the die pad is made smaller, the contacting area between the semiconductor element and the die pad is also made smaller, to cause such a problem that the semiconductor element is delaminated easily during assembling, or the package body is broken. In addition, the degradation of the heat removal capability due to the increase of the heat resistance, is also the problem in this technique.
On the other hand, there is also proposed, in Japanese Patent Application Laying Open No. 2-74065, such a technique that a die pad having a shape of letter "X", is employed to prevent the package crack. However, in this technique, the problem of the above-mentioned degradations of the heat radiation ability and the physical strength of the lead frame and the package body, becomes even more serious.
Accordingly, under the progress of the large-sized semiconductor element and the miniaturization of the package body, an effective technique to prevent the package crack is desired.